manindra.pngManindra Agrawal, Conference Lead

Prof. Manindra Agrawal received his B. Tech and Ph. D in Computer Science and Engineering from the Indian Institute of Technology, Kanpur in 1986 and 1991, respectively. He was a fellow at the School of Mathematics, SPIC Science Foundation, Chennai from 1993 to 1995, and a Humboldt Fellow at the University of Ulm, Germany, from 1995 to 1996. He joined the faculty at IIT Kanpur as an Assistant Professor in the Department of Computer Science and Engineering in 1996. He was appointed as the N. Rama Rao Chair Professor in 2003. He was a visiting scholar at the Institute of Advanced Studies, Princeton, USA from 2003-04. Prof. Agrawal has made significant contributions to the theory of efficient reactions between computational problems, which are part of the program studying the well-known “P vs NP” question in mathematics/ computer science.

He is the recipient of several national and international awards including the first Infosys Prize for Mathematicsand the Shanti Swarup Bhatnagar Award in Mathematical Sciences in 2003, Fulkerson Prize 2006 and the Gödel Prize 2006. He has been honored with Padma Shri in 2013.


Mohamed Asan Basiri M, Challenge Lead, Applied Research

I have completed my B.E. (Electronics and Communication Engineering) and M.E. (Embedded Systems) from Anna University, Tamilnadu in 2009 and 2011 respectively. I obtained a Ph.D. degree from Indian Institute of Information Technology Design and Manufacturing (IIITDM) Kancheepuram, India in July 2016. My Ph.D. work mainly focuses on VLSI architectures for various discrete transformations such as DWT, FFT, DHT, and integer DCT. Also, it includes the basic signal processing elements such as MAC, multi-precision multiplier, an efficient high fan-in multiplexer.

Currently, I work as a Post Doctoral Fellow in the department of Computer Science and Engineering, Indian Institute of Technology (IIT) Kanpur, India, where my research deals with asynchronous crypto hardware implementations, Galois arithmetic, Bloom filter based payload matching, decision tree/TCAM based packet classification, backplane switch interconnects, and hardware-software co-designs using Artix-7 FPGA with Xilinx and Cadence ASIC design tool (Genus and Innovus). My research interest includes VLSI architectures for cryptography, signal processing, network packet processing elements, and reconfigurable designs.


Nazia Irshad, Project Manager

2019_Photo_Placeholder.pngSanjiv Khosla, Global Coordinator

Saurabh.jpgSaurabh Kumar, Challenge Lead, Capture the Flag

I completed MCA from Uttarakhand Technical University, Dehradun in 2010 further, obtained my M. Tech (Information Technology) from Indian Institute of Technology, Roorkee in 2012. During M. Tech I worked on Secure Routing for Mobile Ad-hoc Networks.

Presently, I am a Ph.D. student at Indian Institute of Technology, Kanpur, wherein I am working in the domain of Android Security. Have also performed TA duties in the Computer System Security course at IIT Kanpur, where my work involved majorly preparing CTFs, Quiz and assignments in support of course curriculums. IIT Kanpur is also organizing an online course hosted at where I am again involved as TA preparing CTFs and Quiz. This course duration is from 1st June, 2017 to 31st July, 2017 and deals with security related to system software, networks, mobile platform, supply chains etc.

Before joining Ph.D, I had a brief tenure at Central Bureau of Investigation (CBI), Govt. of India, as Assistant Programmer. Being in CBI, I dealt with the Computer Forensic, Mobile Forensic, System Analysis, Social Media Analysis, assisting IOs in investigation related to Digital Evidence and development of customized application related to Office Automation, etc.

Rohit.jpgRohit Negi, Challenge Lead, Embedded Security Challenge

An adaptable, organized and responsible graduate with 4+ years of experience specializing in industrial automation and operational technologies. My past experience, current work and interest are in the field of cyber security and cyber defense of protection and control system used in critical infrastructure. Core work is to finding security vulnerabilities in automated critical infrastructures, finding ways to circumvent the threats that will be associated with such vulnerabilities and its mitigation techniques.

sandeep.pngSandeep Shukla, Faculty Lead

Prof. Sandeep Kumar Shukla is currently Poonam and Prabhu Goel Chair Professor and Head of Computer Science and Engineering Department, Indian Institute of Technology, Kanpur, India. He is currently the Editor-in-Chief of ACM Transactions on Embedded Systems, and associate editor for ACM transactions on Cyber Physical Systems.

Professor Sandeep K. Shukla is an IEEE fellow, an ACM Distinguished Scientist, and served as an IEEE Computer Society Distinguished Visitor during 2008-2012, and as an ACM Distinguished Speaker during 2007-2014. In the past, he has been associate editors for IEEE Transactions on Computers, IEEE Transactions on Industrial Informatics, IEEE Design & Test, IEEE Embedded Systems Letters, and many other journals.

He was a faculty at the Virginia Tech, Arlington, Virginia between 2002 and 2015. In 2014, he was named Fellow of the Institute of Electrical and Electronics Engineers (IEEE)[1] for contributions to applied probablistic model checking for system design. He has authored several books on systems

Professor Sandeep K. Shukla also has been a visiting faculty at INRIA, France and University of Kaiserslautern, Germany.