The Organizers - NYU TANDON


Zahra Ghodsi: Challenge Co-Lead

Zahra is a second year Ph.D. candidate at New York University and a recipient of the Ernst Weber Fellowship from the department of Electrical and Computer Engineering. Zahra received her B.S. degree in Electrical Engineering from Sharif University of Technology in 2013 and M.S. degree in Computer Engineering from New York University in 2015.


Santiago Torres: Challenge Co-Lead

Santiago is a second-year Ph.D. Student at NYU's Center for Cyber Security (CCS) under the guidance of Prof. Justin Cappos. His interests include binary analysis, cryptography, operating systems, and security-oriented software engineering. His current research focuses on securing the software development lifecycle, password storage mechanisms, and update systems. Santiago is a member of the Arch Linux security team and has contributed patches to F/OSS projects on various degrees of scale, including Git, the Linux Kernel, NeoMutt, and the Briar project.

kevin-gallagher.pngKevin Gallagher: MENTOR

Kevin Gallagher's fascination with cybersecurity began when, as an undergraduate, he began reading articles about cyber attacks, vulnerabilities and defense. The fact that his college didn’t offer a course on the subject hardly deterred him. Gallagher approached a professor, conducted research and drew up a curriculum for an independent study on “Introduction to Cybersecurity.” The curriculum was approved and Kevin has been hooked on cybersecurity ever since.

A native New Yorker, Kevin went to high school in Queens and earned his bachelor's degree in Computer Science from CUNY's Hunter College. While there, he developed data analytics software for CUNY's Central Office and conducted research at the CUNY Graduate Center on bibliometrics and social networks. He is currently pursuing his Ph.D. in Computer Science at NYU Tandon School of Engineering and will earn his doctorate in 2019. His areas of interest focus on unconventional security areas, namely anonymity, privacy and censorship circumvention.

Kevin served as the Applied Research Competition Lead in 2016 and experienced firsthand how CSAW was bridging the gap between academia and the industry.


Siddharth Garg: Faculty Guide

Siddharth Garg received his Ph.D. degree in Electrical and Computer Engineering from Carnegie Mellon University in 2009, and a B.Tech. degree in Electrical Enginerring from the Indian Institute of Technology Madras. He joined NYU in Fall 2014 as an Assistant Professor, and prior to that, was an Assistant Professor at the University of Waterloo from 2010-2014. His general research interests are in computer engineering, and more particularly in secure, reliable and energy-efficient computing.

In 2016, Siddharth was listed in Popular Science Magazine's annual list of "Brilliant 10" researchers. Siddharth has received the NSF CAREER Award (2015), and paper awards at the IEEE Symposium on Security and Privacy (S&P) 2016, USENIX Security Symposium 2013, at the Semiconductor Research Consortium TECHCON in 2010, and the International Symposium on Quality in Electronic Design (ISQED) in 2009. Siddharth also received the Angel G. Jordan Award from ECE department of Carnegie Mellon University for outstanding thesis contributions and service to the community. He serves on the technical program committee of several top conferences in the area of computer engineering and computer hardware, and has served as a reviewer for several IEEE and ACM journals.

Indian Institute of Technology, KaNpur


Mohamed Asan Basiri M: Challenge Lead

I have completed my B.E. (Electronics and Communication Engineering) and M.E. (Embedded Systems) from Anna University, Tamilnadu in 2009 and 2011 respectively. I obtained a Ph.D. degree from Indian Institute of Information Technology Design and Manufacturing (IIITDM) Kancheepuram, India in July 2016. My Ph.D. work mainly focuses on VLSI architectures for various discrete transformations such as DWT, FFT, DHT, and integer DCT. Also, it includes the basic signal processing elements such as MAC, multi-precision multiplier, an efficient high fan-in multiplexer.

Currently, I work as a Post Doctoral Fellow in the department of Computer Science and Engineering, Indian Institute of Technology (IIT) Kanpur, India, where my research deals with asynchronous crypto hardware implementations, Galois arithmetic, Bloom filter based payload matching, decision tree/TCAM based packet classification, backplane switch interconnects, and hardware-software co-designs using Artix-7 FPGA with Xilinx and Cadence ASIC design tool (Genus and Innovus). My research interest includes VLSI architectures for cryptography, signal processing, network packet processing elements, and reconfigurable designs.

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